2022-09-11 16:44:53 +00:00
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Thingamajig v1.1-dev
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====================
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2022-08-18 21:14:06 +00:00
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2022-09-12 21:05:37 +00:00
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Thingamajig v1.1 is a RISC/MISC homebrew computer architecture. Its git
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2022-09-08 20:50:13 +00:00
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repository can be found at
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2022-08-18 21:14:06 +00:00
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https://ahti.space/git/crazyettin/Thingamajig.
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Included Software
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-----------------
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2022-08-23 15:37:59 +00:00
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The repository includes an emulator implementation of Thingamajig with a
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2022-08-18 21:14:06 +00:00
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control program for the emulated punched tape reader and punch, and an
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assembler and a disassembler, all written in FreePascal. It also
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includes couple of simple example programs for Thingamajig written in
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2022-09-08 20:11:24 +00:00
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assembly.
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2022-08-18 21:14:06 +00:00
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Registers and Memory
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--------------------
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* 24-bit instruction register IR
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* 16-bit instruction and return pointers IP and RP
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* 8-bit general-purpose registers R0-R3
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* 8-bit memory locations 0-FFFF
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2022-08-26 11:36:42 +00:00
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Multi-byte values are big-endian. Memory locations 0-FFEF are used for
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2022-09-15 17:54:29 +00:00
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RAM while FFF0-FFFF are reserved for memory mapped devices.
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Input and output are mapped to address FFFF, while arbitrary devices can
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be mapped to the other reserved addresses. When interacting with memory
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mapped devices Thingamajig will stop processing to wait for the device
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to be ready if needed.
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Instructions
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------------
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2022-08-25 14:19:32 +00:00
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Instructions without an immediate or address argument are 8-bit, those
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with an immediate one 16-bit, and those with an address one 24-bit. The
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instruction pointer is incremented before being accessed or modified.
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0 HALT
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1 RET IP = *RP; RP += 2
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2022-09-11 16:44:53 +00:00
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2 SHL RX, N RX <<= N (logical) Shifts of 1-4 steps,
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3 SHR RX, N RX >>= N (logical) with 4 encoded as 0
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4 ROL RX, N RX <<= N (rotating) in machine code.
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5 ROR RX, N RX >>= N (rotating)
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6 NAND RX, RY RX = ~(RX & RY)
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7 AND RX, RY RX &= RY
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8 OR RX, RY RX |= RY
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9 XOR RX, RY RX ^= RY
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2022-08-25 14:19:32 +00:00
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A LOAD RX, ~0, IMM RX = IMM Written as "LOAD RX, #IMM"
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0, ADDR RX = *ADDR Written as "LOAD RX, ADDR"
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B STORE RY, ADDR *ADDR = RY Written as "STORE ADDR, RY"
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C BREQ RX, RY, ADDR if (RX == RY) IP = ADDR
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D BRNEQ RX, RY, ADDR if (RX != RY) IP = ADDR
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E CLEQ RX, RY, ADDR if (RX == RY) {RP -= 2; *RP = IP; IP = ADDR}
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F CLNEQ RX, RY, ADDR if (RX != RY) {RP -= 2; *RP = IP; IP = ADDR}
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Assembly Language
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-----------------
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Lines of assembly are of the following form:
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LABEL: OPER ARG1, ARG2, ARG3 ;Comment
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The language is case-insensitive and uses hexadecimal numbers. A label
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can consist of any alphanumeric characters as long as it is not
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interpretable as a hexadecimal number. The label, instruction, and
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comment elements are all optional, as is spacing between the arguments.
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For the arguments of each instruction see the previous section.
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Address arguments can be either absolute addresses or references to or
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relative to a label. Relative references are of the form LABEL +/- N;
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the spacing is optional.
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In addition to the true instructions there are three
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2022-09-15 17:54:29 +00:00
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pseudo-instructions. ORG sets the location of the following code and
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data; as it has no direct equivalent in machine code it cannot have a
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label. The default starting address of 0 does not need to be indicated
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with ORG. DATA introduces a byte of data. ADDR introduces two bytes of
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data containing the address of a reference to or relative to a label.
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2022-08-26 11:36:42 +00:00
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Boot
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----
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2022-08-29 21:48:37 +00:00
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At boot the initial program loader (IPL) loads a program to RAM starting
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at address 0 after which is cedes control to the CPU. If an
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implementation has a front panel the IPL is optional. The instruction
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and return pointers are initialised as 0 and the first address after RAM
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respectively, while other registers and RAM are uninitialised.
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2022-08-26 11:36:42 +00:00
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Emulator
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--------
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2022-08-29 21:10:02 +00:00
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By default the emulator runs at roughly 500 KIPS, has 2 KiB of RAM, and
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interacts with memory mapped devices at roughly 1000 B/s. The arguments
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2022-08-29 21:10:02 +00:00
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-dRAM4, -dRAM8, -dRAM16, -dRAM32, and -dRAM64 can be used to compile
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the emulator with 4, 8, 16, 32, or 64 KiB (minus the reserved addresses)
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of RAM respectively instead and the speed limitations can be removed
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with the argument -dfast.
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2022-08-26 16:49:58 +00:00
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Input and output are handled by an emulated glass teletype terminal with
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2022-09-08 20:50:13 +00:00
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local echo on by default. Of the control characters bell (^G),
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backspace (^H), line feed (^J), carriage return (^M), and device control
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characters two (^R) and four (^T) are used by the terminal: the device
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control characters are used to turn the local echo on and off
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respectively while the rest have their standard uses. The backspace and
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delete keys input their respective characters and non-character keys
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null.
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2022-08-24 11:40:41 +00:00
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In Linux the emulator can be compiled with support for a character
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printer and an emulated punched tape reader and punch with the arguments
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-dprinter and -dtape respectively. The printer is mapped to address FFFE
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and the tape reader and punch to FFFD. The printer prints into
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/dev/usb/lp0 and the tape files read from and punched to are (re)set
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2022-08-26 11:36:42 +00:00
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using the program tapectl.
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The IPL loads a program from a file specified when launching the
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emulator.
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2022-08-18 21:14:06 +00:00
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