211 lines
7.0 KiB
C++
211 lines
7.0 KiB
C++
/******************************************************************************
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COPYRIGHT(C) JONAS 'SORTIE' TERMANSEN 2011.
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This file is part of Sortix.
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Sortix is free software: you can redistribute it and/or modify it under the
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terms of the GNU General Public License as published by the Free Software
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Foundation, either version 3 of the License, or (at your option) any later
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version.
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Sortix is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
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details.
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You should have received a copy of the GNU General Public License along
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with Sortix. If not, see <http://www.gnu.org/licenses/>.
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descriptor_tables.cpp
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Initializes and handles the GDT, TSS and IDT.
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******************************************************************************/
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#include "platform.h"
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#include "iirqhandler.h"
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#include <libmaxsi/memory.h>
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#include "descriptor_tables.h"
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#include "isr.h"
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#include "panic.h"
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using namespace Maxsi;
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namespace Sortix
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{
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namespace GDT
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{
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// Lets us access our ASM functions from our C++ code.
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extern "C" void gdt_flush(addr_t);
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extern "C" void tss_flush();
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gdt_entry_t gdt_entries[6];
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gdt_ptr_t gdt_ptr;
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tss_entry_t tss_entry;
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void Init()
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{
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gdt_ptr.limit = (sizeof(gdt_entry_t) * 6) - 1;
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gdt_ptr.base = (addr_t) &gdt_entries;
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SetGate(0, 0, 0, 0, 0); // Null segment
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SetGate(1, 0, 0xFFFFFFFF, 0x9A, 0xCF); // Code segment
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SetGate(2, 0, 0xFFFFFFFF, 0x92, 0xCF); // Data segment
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SetGate(3, 0, 0xFFFFFFFF, 0xFA, 0xCF); // User mode code segment
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SetGate(4, 0, 0xFFFFFFFF, 0xF2, 0xCF); // User mode data segment
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WriteTSS(5, 0x10, 0x0);
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gdt_flush((addr_t) &gdt_ptr);
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tss_flush();
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}
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// Set the value of a GDT entry.
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void SetGate(int32_t num, uint32_t base, uint32_t limit, uint8_t access, uint8_t gran)
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{
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gdt_entries[num].base_low = (base & 0xFFFF);
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gdt_entries[num].base_middle = (base >> 16) & 0xFF;
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gdt_entries[num].base_high = (base >> 24) & 0xFF;
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gdt_entries[num].limit_low = (limit & 0xFFFF);
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gdt_entries[num].granularity = (limit >> 16) & 0x0F;
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gdt_entries[num].granularity |= gran & 0xF0;
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gdt_entries[num].access = access;
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}
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// Initialise our task state segment structure.
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void WriteTSS(int32_t num, uint16_t ss0, uint32_t esp0)
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{
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// Firstly, let's compute the base and limit of our entry into the GDT.
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addr_t base = (addr_t) &tss_entry;
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uint32_t limit = base + sizeof(tss_entry);
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// Now, add our TSS descriptor's address to the GDT.
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SetGate(num, base, limit, 0xE9, 0x00);
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// Ensure the descriptor is initially zero.
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Memory::Set(&tss_entry, 0, sizeof(tss_entry));
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tss_entry.ss0 = ss0; // Set the kernel stack segment.
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tss_entry.esp0 = esp0; // Set the kernel stack pointer.
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// Here we set the cs, ss, ds, es, fs and gs entries in the TSS. These specify what
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// segments should be loaded when the processor switches to kernel mode. Therefore
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// they are just our normal kernel code/data segments - 0x08 and 0x10 respectively,
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// but with the last two bits set, making 0x0b and 0x13. The setting of these bits
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// sets the RPL (requested privilege level) to 3, meaning that this TSS can be used
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// to switch to kernel mode from ring 3.
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tss_entry.cs = 0x08 | 0x3;
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tss_entry.ss = tss_entry.ds = tss_entry.es = tss_entry.fs = tss_entry.gs = 0x10 | 0x3;
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}
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void SetKernelStack(size_t* stack)
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{
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#ifdef PLATFORM_X86
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tss_entry.esp0 = (uint32_t) stack;
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#else
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#warning "TSS is not yet supported on this arch!"
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while(true);
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#endif
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}
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}
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namespace IDT
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{
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// Lets us access our ASM functions from our C++ code.
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extern "C" void idt_flush(uint32_t);
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idt_entry_t idt_entries[256];
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idt_ptr_t idt_ptr;
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void Init()
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{
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#ifdef PLATFORM_X86
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idt_ptr.limit = sizeof(idt_entry_t) * 256 - 1;
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idt_ptr.base = (uint32_t)&idt_entries;
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Memory::Set(&idt_entries, 0, sizeof(idt_entry_t)*256);
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// Remap the irq table.
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X86::OutPortB(0x20, 0x11);
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X86::OutPortB(0xA0, 0x11);
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X86::OutPortB(0x21, 0x20);
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X86::OutPortB(0xA1, 0x28);
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X86::OutPortB(0x21, 0x04);
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X86::OutPortB(0xA1, 0x02);
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X86::OutPortB(0x21, 0x01);
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X86::OutPortB(0xA1, 0x01);
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X86::OutPortB(0x21, 0x0);
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X86::OutPortB(0xA1, 0x0);
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SetGate( 0, (uint32_t) isr0 , 0x08, 0x8E);
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SetGate( 1, (uint32_t) isr1 , 0x08, 0x8E);
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SetGate( 2, (uint32_t) isr2 , 0x08, 0x8E);
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SetGate( 3, (uint32_t) isr3 , 0x08, 0x8E);
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SetGate( 4, (uint32_t) isr4 , 0x08, 0x8E);
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SetGate( 5, (uint32_t) isr5 , 0x08, 0x8E);
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SetGate( 6, (uint32_t) isr6 , 0x08, 0x8E);
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SetGate( 7, (uint32_t) isr7 , 0x08, 0x8E);
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SetGate( 8, (uint32_t) isr8 , 0x08, 0x8E);
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SetGate( 9, (uint32_t) isr9 , 0x08, 0x8E);
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SetGate(10, (uint32_t) isr10, 0x08, 0x8E);
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SetGate(11, (uint32_t) isr11, 0x08, 0x8E);
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SetGate(12, (uint32_t) isr12, 0x08, 0x8E);
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SetGate(13, (uint32_t) isr13, 0x08, 0x8E);
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SetGate(14, (uint32_t) isr14, 0x08, 0x8E);
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SetGate(15, (uint32_t) isr15, 0x08, 0x8E);
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SetGate(16, (uint32_t) isr16, 0x08, 0x8E);
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SetGate(17, (uint32_t) isr17, 0x08, 0x8E);
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SetGate(18, (uint32_t) isr18, 0x08, 0x8E);
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SetGate(19, (uint32_t) isr19, 0x08, 0x8E);
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SetGate(20, (uint32_t) isr20, 0x08, 0x8E);
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SetGate(21, (uint32_t) isr21, 0x08, 0x8E);
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SetGate(22, (uint32_t) isr22, 0x08, 0x8E);
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SetGate(23, (uint32_t) isr23, 0x08, 0x8E);
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SetGate(24, (uint32_t) isr24, 0x08, 0x8E);
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SetGate(25, (uint32_t) isr25, 0x08, 0x8E);
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SetGate(26, (uint32_t) isr26, 0x08, 0x8E);
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SetGate(27, (uint32_t) isr27, 0x08, 0x8E);
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SetGate(28, (uint32_t) isr28, 0x08, 0x8E);
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SetGate(29, (uint32_t) isr29, 0x08, 0x8E);
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SetGate(30, (uint32_t) isr30, 0x08, 0x8E);
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SetGate(31, (uint32_t) isr31, 0x08, 0x8E);
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SetGate(32, (uint32_t) irq0, 0x08, 0x8E);
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SetGate(33, (uint32_t) irq1, 0x08, 0x8E);
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SetGate(34, (uint32_t) irq2, 0x08, 0x8E);
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SetGate(35, (uint32_t) irq3, 0x08, 0x8E);
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SetGate(36, (uint32_t) irq4, 0x08, 0x8E);
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SetGate(37, (uint32_t) irq5, 0x08, 0x8E);
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SetGate(38, (uint32_t) irq6, 0x08, 0x8E);
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SetGate(39, (uint32_t) irq7, 0x08, 0x8E);
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SetGate(40, (uint32_t) irq8, 0x08, 0x8E);
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SetGate(41, (uint32_t) irq9, 0x08, 0x8E);
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SetGate(42, (uint32_t) irq10, 0x08, 0x8E);
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SetGate(43, (uint32_t) irq11, 0x08, 0x8E);
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SetGate(44, (uint32_t) irq12, 0x08, 0x8E);
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SetGate(45, (uint32_t) irq13, 0x08, 0x8E);
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SetGate(46, (uint32_t) irq14, 0x08, 0x8E);
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SetGate(47, (uint32_t) irq15, 0x08, 0x8E);
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SetGate(128, (uint32_t) isr128, 0x08, 0x8E); // System Calls
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SetGate(177, (uint32_t) isr177, 0x08, 0x8E); // System Calls
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idt_flush((uint32_t)&idt_ptr);
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#else
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#warning "IDT is not yet supported on this arch!"
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while(true);
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#endif
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}
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void SetGate(uint8_t num, uint32_t base, uint16_t sel, uint8_t flags)
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{
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idt_entries[num].base_lo = base & 0xFFFF;
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idt_entries[num].base_hi = (base >> 16) & 0xFFFF;
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idt_entries[num].sel = sel;
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idt_entries[num].always0 = 0;
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idt_entries[num].flags = flags | 0x60;
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}
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}
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}
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