Add the same speed limitations to the IPL that already applied to the CPU in the emulator, make it possible to use ORG in non-initial positions, and add information on flow control to the readme

assembler.pas

@@ -258,8 +258,20 @@ begin
                     else LblError;
                 end
                 else begin
-                    writeln ('Error (line ', LP, '): ORG must be the first instruction');
+                    if Elem [0] = '' then begin
-                    halt (1);
+                        //Set the starting point
+                        if ExtractWord (3, Line, [' ']) <> '' then ArgError;
+                        DatOrg := ExtractWord (2, Line, [' ']);
+                        try
+                            if Hex2Dec (DatOrg) <=$ffff then begin
+                                BP := Hex2Dec (DatOrg);
+                            end
+                            else ArgError;
+                        except
+                            ArgError;
+                        end;
+                    end
+                    else LblError;
                 end;
             end
 

emulator.pas

@@ -319,6 +319,7 @@ begin
     repeat
         read (Prog, Mem [IP]);
         IP := IP + 1;
+        IC := IC + 1;
     until (eof (Prog));
 
     //Reinitialise the instruction pointer

readme.md

@@ -23,9 +23,12 @@ Registers and Memory
   * 8-bit memory locations 0-FFFF
 
 Multi-byte values are big-endian. Memory locations 0-FFEF are used for
-RAM while FFF0-FFFF are reserved for memory mapped devices. Input and
+RAM while FFF0-FFFF are reserved for memory mapped devices.
-output are mapped to address FFFF, while arbitrary devices can be mapped
+
-to the other reserved addresses.
+Input and output are mapped to address FFFF, while arbitrary devices can
+be mapped to the other reserved addresses. When interacting with memory
+mapped devices Thingamajig will stop processing to wait for the device
+to be ready if needed.
 
 Instructions
 ------------
@@ -74,11 +77,11 @@ relative to a label. Relative references are of the form LABEL +/- N;
 the spacing is optional.
 
 In addition to the true instructions there are three
-pseudo-instructions. ORG defines the starting address of the program: it
+pseudo-instructions. ORG sets the location of the following code and
-can only occur as the first instruction and cannot have a label, and is
+data; as it has no direct equivalent in machine code it cannot have a
-not required if the starting address is 0. DATA introduces a byte of
+label. The default starting address of 0 does not need to be indicated
-data. ADDR introduces two bytes of data containing the address of a
+with ORG. DATA introduces a byte of data. ADDR introduces two bytes of
-reference to or relative to a label.
+data containing the address of a reference to or relative to a label.
 
 Boot
 ----